KARTHIKEYAN SABHANATARAJAN 999, SW 16th Avenue, Apt 101, Gainesville FL - 326 01 Phone : 1-502-821-1927 E-mail : sabhanatarajan@hcs.ufl.edu OBJECTIVE: Seeking a challenging full time position in the fields of Embedded Systems design, Computer Networking and Architecture utilizing my software, hardware and analytical skills EDUCATION: Master of Science, Electrical & Computer Engineering University of Florida, Gainesville, Florida August 2008 GPA: 4.0 /4.0 Bachelor of Engineering in Electronics & Communications Anna University, Chennai, India May 2006 Percentage: 85 / 100 EXPERIENCE: Research Assistant and Project Leader , Energy Efficient Ethernet Project (NSF NETS/NBD) August '06 - Present Advisors: Dr. Alan D. George, Dr. Ann Gordon-Ross Dept. of Electrical & Computer Engineering, University of Florida Lead a team of 3 Research Assistants in the design and development of custom Energy Efficient Ethernet Controller (NIC) and currently involved in interfacing the NIC to the linux system. Research Assistant , Wireless Networking R&D lab, Anna University, India July '05 - May '06 PUBLICATIONS: K.Sabhanatarajan, A.Gordon-Ross, M.Oden, M.Navada, A.George, "Smart-NICs: Power Proxying for Reduced Power Consumption in Network Edge Devices", IEEE Computer Society Annual symposium on VLSI (ISVLSI), April 2008, Montpellier, France. RELEVANT GRADUATE & UNDER-GRADUATE COURSES: Graduate Computer Communication, Data & Computer Networking, Embedded Systems , Computer Architecture, Parallel Computer Architecture, Billion Transistor Computer Architecture, Reconfigurable Computing, VLSI, Advanced VLSI, Microprocessor & Applications, Data Structures & Algorithms, Internet & Java. PROJECTS: * Currently involved in prototyping Energy efficient Network Interface Card implementing the IEEE 802.3az Rapid PHY Scaling concept, which adapts link rate according to the link utilization using MAC handshake mechanism. Specifically involved in writing PCI device driver for our custom NIC. * Developed a UART character device driver implementing concepts of Busy-waiting and Interrupts * Gained Hands-on experience in NIC and router architectures (first generation) using Stanford NetFPGA and RiceNIC platforms. * Designed a dynamically adaptive cache algorithm for improving Energy Efficiency in SimpleScalar simulation environment (using C) * Implemented a hybrid energy efficient deep packet content inspector utilizing Bloom Filters and Content Addressable Memories (CAMs) for NIC based Network Intrusion Detection system. * Devised a software packet classifier using embedded PowerPCs (using C) on Xilinx Virtex-II Pro and compared its performance to CAM based header classifier for power proxying * Developed a Content Addressable Memory based parallel packet classifier for Network Intrusion Detection Systems (NIDS) - (using Verilog) TECHNICAL/COMPUTER SKILLS: Programming / HDL Languages : C,JAVA,Python, Shell Scripting (BASH), Verilog, VHDL Device Driver / Architecture Skills : Linux device driver , x86 assembly and architecture, PCI, SimpleScalar, Wattch Real time Networking Platforms : Stanford NetFPGA router platform, RiceNIC Operating Systems : Linux, UNIX, Windows Hardware Platforms : Xilinx Virtex-II Pro, Xilinx Virtex 4 EDA Design Tools : Xilinx Embedded Development Kit (EDK), Xilinx ISE, Chipscope AWARDS AND HONORS : University of Florida International Center Certificate of Outstanding Academic Achievement Member of "Eta Kappa Nu" honoring academic excellence in Electrical and Computer Engineering